bus sizing

From: Doug Little <doug_at_innerworkings.co.uk>
Date: Tue, 23 Jun 1998 09:49:31 +0100

>> Whatever the size of the transfert on the 040 bus is, it reads (or write)
>> 32 bits word. So if you make a move.b (a0)+,(a1)+ you've got 2 32 bits
>> accesses.

>My assembler isn't what it should be, but is the above the same as 2 16
>access on the 030 or 4 16 bits access? Are you moving 32 bits or 64 bits?

The 68040 always uses 32-bit read/write operations. So, if you move a byte
it will read a longword from the source, one from the destination, combine
required portions of each 32-bit field and write back the result. Even
if you try to read a 16-bit word straddling two 32-bit longwords, it will
have to
read both longwords from the source, read them from the destination, then
write them both back after modification. Generally, you want to avoid that
wherever possible...

The caches make these operations faster, especially in burst mode, and even
more where read/writes occur in a localised area.

Fortunately, the instructions still do what they are supposed to do (move
or words), but the internal operations are usually wider, and the extra data
masked off or ignored.

The 020/030 use dynamic bus sizing which allow them to do all sorts of
strange stuff for narrow reads/writes. The 040 needs a 32-bit bus and a data
cache to operate at anywhere near maximum efficiently.

Received on ti. juni 23 1998 - 20:41:00 CEST

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